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july 2007 rev 4 1/17 17 54vcxh162374 rad hard low voltage cmos 16-b it d-type flip-flop (3-state) with 3.6v tolerant inputs and outputs features 1.65 to 3.6v inputs and outputs high speed: ?t pd = 3.4ns (max) at v cc = 3.0 to 3.6v ?t pd = 4.8ns (max) at v cc = 2.3 to 2.7v symmetrical impedance outputs: ?|i oh | = i ol = 12ma (min) at v cc = 3.0v ?|i oh | = i ol = 8ma (min) at v cc = 2.3v power down protection on inputs and outputs 26 ? serie resistors in outputs operating voltage range: ?v cc (opr) = 1.65v to 3.6v pin and function compatible with 54 series h162374 bus hold provided on both sides cold spare function latch-up performance exceeds 300ma (jesd 17) esd performance: ? hbm > 2000v (mil std 883 method 3015); mm > 200v 300krad mil1019.6 condition a, (rha qml qualification extension undergone) no sel, no seu under 72 mev/cm2/mg let heavy ions irradiation qml qualified product device fully compliant with dscc smd 5962-05212 description the 54vcxh162374 is a low voltage cmos 16 bit d-type flip-flop with 3 state outputs non inverting fabricated with sub-micron silicon gate and five-layer metal wiring c 2 mos technology. it is ideal for low power and very high speed 1.65 to 3.6v applications; it can be interfaced to 3.6v signal environment for both inputs and outputs. these 16 bit d-type flip-flops are controlled by two clock inputs (nck) and two output enable inputs (noe ). on the positive transition of the (nck), the nq outputs will be set to th e logic state that were setup at the nd inputs. while the (noe ) input is low, the 8 outputs (nq) will be in a normal state (high or low logic level) and while high level the outputs will be in a high impedance state. any output control does not affect the internal operation of flip flops; that is, the old data can be retained or the new data can be entered even while the outputs are off. flat-48 www.st.com
contents 54vcxh162374 2/17 contents 1 logic symbols and i/o equivalent circuit . . . . . . . . . . . . . . . . . . . . . . . . 3 2 pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.1 pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.3 truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.1 recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5 test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 6 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 7 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 8 order code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 9 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
54vcxh162374 logic symbols and i/o equivalent circuit 3/17 1 logic symbols and i/o equivalent circuit figure 1. iec logic symbols figure 2. input and output equivalent circuit
logic symbols and i/o equivalent circuit 54vcxh162374 4/17 note: this logic diagram has not to be used to estimate propagation delays figure 3. logic diagram
54vcxh162374 pin settings 5/17 2 pin settings 2.1 pin connection figure 4. pin connection (top through view)
pin settings 54vcxh162374 6/17 2.2 pin description 2.3 truth table note: x = do not care; z = high impedance table 1. pin description pin n symbol name and function 11oe 3 state output enable input (active low) 2, 3, 5, 6, 8, 9, 11, 12 1q0 to 1q7 3-state outputs 13, 14, 16, 17, 19, 20, 22, 23 2q0 to 2q7 3-state outputs 24 2oe 3 state output enable input (active low) 25 2ck clock input 36, 35, 33, 32, 30, 29, 27, 26 2d0 to 2d7 data inputs 47, 46, 44, 43, 41, 40, 38, 37 1d0 to 1d7 data inputs 48 1ck clock input 4, 10, 15, 21, 28, 34, 39, 45 gnd ground (0v) 7, 18, 31, 42 v cc positive supply voltage table 2. truth table inputs output oe le d q hxx z lx no change (1) 1. q outputs are latched at the time when the le input is taken low logic level. lll lhh
54vcxh162374 maximum rating 7/17 3 maximum rating stressing the device above the rating listed in the ?absolute maximum ratings? table may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. refer also to the stmicroelectronics sure program and other relevant quality documents. 3.1 recommended operating conditions table 3. absolute maximum ratings symbol parameter value unit v cc supply voltage -0.5 to +4.6 v v i dc input voltage -0.5 to +4.6 v v o dc output voltage (off state) -0.5 to +4.6 v v o dc output voltage (high or low state) (1) 1. i o absolute maximum rating must be observed -0.5 to v cc + 0.5 v i ik dc input diode current - 50 ma i ok dc output diode current (2) 2. v o < gnd, v o > v cc - 50 ma i o dc output current 50 ma i cc or i gnd dc v cc or ground current per supply pin 100 ma p d power dissipation 400 mw t stg storage temperature -65 to +150 c t l lead temperature (10 sec) 260 c table 4. recommended operating conditions symbol parameter value unit v cc supply voltage 1.8 to 3.6 v v i input voltage -0.3 to 3.6 v v o output voltage (off state) 0 to 3.6 v v o output voltage (high or low state) 0 to v cc v i oh , i ol high or low level output current (v cc = 3.0 to 3.6v) 12 ma i oh , i ol high or low level output current (v cc = 2.3 to 2.7v) 8ma t op operating temperature -55 to 125 c dt/dv input rise and fall time (1) 1. v in from 0.8v to 2v at v cc = 3.0v 0 to 10 ns/v
electrical characteristics 54vcxh162374 8/17 4 electrical characteristics table 5. dc specifications (2.7v < v cc < 3.6v unless otherwise specified) symbol parameter test condition value unit v cc (v) -55 to 125c min max v ih high level input voltage 2.7 to 3.6 2.0 v v il low level input voltage 0.8 v oh high level output voltage 2.7 to 3.6 i o =-100 av cc -0.2 v 2.7 i o =-6 ma 2.2 3.0 i o =-8 ma 2.4 i o =-12 ma 2.2 v ol low level output voltage 2.7 to 3.6 i o =100 a 0.2 v 2.7 i o =6 ma 0.4 3.0 i o =8 ma 0.55 i o =12 ma 0.8 i i input leakage current 2.7 to 3.6 v i = 0 to 3.6v 5 a i i(hold) input hold current 3.0 v i = 0.8v 75 a v i = 2v -75 3.6 v i = 0 to 3.6v 500 i off power off leakage current 0 v i or v o = 0 to 3.6v 10 a i oz high impedance output leakage current 2.7 to 3.6 v i = v ih or v il v o = 0 to 3.6v 10 a i cc quiescent supply current 2.7 to 3.6 v i = v cc or gnd 20 a v i or v o = v cc to 3.6v 20 ? i cc i cc incr. per input 2.7 to 3.6 v ih = v cc - 0.6v 750 a
54vcxh162374 electrical characteristics 9/17 table 6. dc specifications (2.3v < v cc < 2.7v unless otherwise specified) symbol parameter test condition value unit v cc (v) -55 to 125 c min max v ih high level input voltage 2.3 to 2.7 1.6 v v il low level input voltage 0.7 v oh high level output voltage 2.3 to 2.7 i o =-100 av cc -0.2 v 2.3 i o =-4 ma 2.0 i o =-6 ma 1.8 i o =-8 ma 1.7 v ol low level output voltage 2.3 to 2.7 i o =100 a 0.2 v 2.3 i o =6 ma 0.4 i o =8 ma 0.6 i i input leakage current 2.3 to 2.7 v i = v cc or gnd 5 a i i(hold) input hold current 2.3 v i = 0.7v 45 a v i = 1.7v -45 i off power off leakage current 0 v i or v o = 0 to 3.6v 10 a i oz high impedance output leakage current 2.3 to 2.7 v i = v ih or v il v o = 0 to 3.6v 10 a i cc quixent 2.3 to 2.7 v i = v cc or gnd 20 a v i or v o = v cc to 3.6v 20 table 7. dynamic switching characteristics (t a = 25c, input t r = t f = 2.0ns, c l = 30pf, r l = 500 ?) symbol parameter test condition value unit v cc (v) t a = 25 c min typ max v olv dynamic valley low voltage quiet output (1) (2) 1. number of outputs defined as "n". measured with "n-1" outputs switching from high to low or low to high. the remaining output is measured in the low state. 2. parameters guaranteed by design. 2.5 v il = 0v v ih = v cc 0.25 v 3.3 0.35 v ohv dynamic valley high voltage quiet output (2) (3) 3. number of outputs defined as "n". measured with "n-1" outputs switching from high to low or low to high. the remaining output is measured in the high state. 2.5 v il = 0v v ih = v cc -0.25 v 3.3 -0.35 v ohv dynamic valley high voltage quiet output (2) (3) 2.5 v il = 0v v ih = v cc 2.05 v 3.3 2.65
electrical characteristics 54vcxh162374 10/17 table 8. ac electrical characteristics (c l = 30pf, r l = 500 ?, input t r = t f = 2.0ns ) symbol parameter test condition value unit v cc (v) -55 to 125 c min max t plh t phl propagation delay time dn to qn 2.3 to 2.7 1.0 5.5 ns 3.0 to 3.6 0.8 4.5 t plh t phl propagation delay time le to qn 2.3 to 2.7 1.0 6.2 ns 3.0 to 3.6 0.8 4.5 t pzl t pzh output enable time 2.3 to 2.7 1.0 5.1 ns 3.0 to 3.6 0.8 4.6 t plz t phz output disable time 2.3 to 2.7 1.0 ns 3.0 to 3.6 1.0 t s setup time, high or low level dn to le 2.3 to 2.7 1.5 ns 3.0 to 3.6 1.5 t h hold time high or low level dn to le 2.3 to 2.7 1.5 ns 3.0 to 3.6 1.5 t w le pulse width, high 2.3 to 2.7 190 ns 3.0 to 3.6 235 t oslh t oshl output to output skew time (1) (2) 1. skew is defined as the absolute value of the di fference between the actual propagation delay for any two outputs of the same device switching in the same direction, either high or low (t oslh = | t plhm - t plhn |, t oshl = | t phlm - t phln |) 2. parameter guaranteed by design 2.3 to 2.7 0.5 ns 3.0 to 3.6 0.5 table 9. capacitive characteristics symbol parameter test condition value unit v cc (v) t a = 25 c min typ max c in input capacitance 2.5 or 3.3 v in = 0 or v cc 6pf c out output capacitance 2.5 or 3.3 v in = 0 or v cc 7pf c pd power dissipation capacitance (1) 1. c pd is defined as the value of the ic?s internal equivalent capacitance whic h is calculated from the operating current consumption without load. (refer to test circuit) . average operating current can be obtained by the following equation. i cc(opr) = c pd x v cc x f in + i cc /16 (per circuit) 2.5 or 3.3 f in = 10mhz v in = 0 or v cc 20 pf
54vcxh162374 test circuit 11/17 5 test circuit figure 5. test circuit c l = 30pf or equivalent (includes jig and probe capacitance) r l = r 1 = 500 ? or equivalent r t = z out of pulse generator (typically 50 ? ) table 10. test circuit test switch t plh , t phl open t pzl , t plz (v cc = 3.0 to 3.6v) 6v t pzl , t plz (v cc = 2.3 to 2.7v) 2v cc t pzh , t phz gnd
waveforms 54vcxh162374 12/17 6 waveforms figure 6. waveform - nck to qn propagation delays, nck maximum frequency, dn to nck setup and hold times (f = 1mhz; 50% duty cycle) table 11. waveform symbol value symbol v cc 3.0 to 3.6v 2.3 to 2.7v v ih 2.7v v cc v m 1.5v v cc /2 v x v ol +0.3v v ol +0.15v v y v oh -0.3v v oh -0.15v
54vcxh162374 waveforms 13/17 figure 7. waveform - output enable and disable time (f = 1mhz; 50% duty cycle) figure 8. waveform - nck minimum pulse width (f = 1mhz; 50% duty cycle)
package mechanical data 54vcxh162374 14/17 7 package mechanical data 54vcxh162374 products are supplied into ceramic body / metal lid hermetic flat 48-pin space package figure 9. package dimension table 12. flat-48 (mil-std-1835) mechanical data dim. mm inch min typ max min typ max a 2.18 2.47 2.72 0.086 0.097 0.107 b 0.20 0.254 0.30 0.008 0.010 0.012 c 0.12 0.15 0.18 0.005 0.006 0.007 d 15.57 15.75 15.92 0.613 0.620 0.627 e 9.52 9.65 9.78 0.375 0.380 0.385 e2 6.22 6.35 6.48 0.245 0.250 0.255 e3 1.52 1.65 1.78 0.060 0.065 0.070 e 0.635 0.025 f 0.20 0.008 l 6.85 8.38 9.40 0.270 0.330 0.370 q 0.66 0.79 0.92 0.026 0.031 0.036 s1 0.25 0.43 0.61 0.010 0.017 0.024 7330585b
54vcxh162374 order code 15/17 8 order code table 13. order code package lead finish radiation level flight model engineering model qml-v qml-q flat-48 gold 300krad rhfxh162374k-01v rhfxh162374k-01q rhrxh162374k1 gold 100krad rhrxh162374k-01v rhrxh162374k-01q rhrxh162374 k1 solder dip 100krad RHRXH162374K-02V rhrxh162374k-02q use the above one
revision history 54vcxh162374 16/17 9 revision history table 14. revision history date revision changes 09-jul-2004 1 first release. 17-may-2005 2 smd qualified. 19-jun-2006 3 300krad bullet updated, new template, mechanical data updated 30-jul-2007 4 typo in table 12 on page 14 .
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